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0026526Community[OCCT] OCCT:Modeling Datapublic2015-08-06 12:012016-04-20 15:48
Vico Liang 
bugmaster 
normalmajor 
closedfixed 
[OCCT] 6.9.0 
[OCCT] 7.0.0[OCCT] 7.0.0 
Not needed
0026526: BRepTools_WireExplorer can't explore all edges of a closed wire.
TopoDS_Wire aWire = // Load from Wire_Explorer.brep
for (BRepTools_WireExplorer aWE(aWire); aWE.More(); aWE.Next())
{
 
}

The loop above can't iterate all edges of the wire, it will just iterate several edges of the wire.

Not required
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? Wire_Explorer.brep (1,048) 2015-08-06 12:01
https://tracker.dev.opencascade.org/
png wire.PNG (49,786) 2015-09-22 13:55
https://tracker.dev.opencascade.org/
Issue History
2015-08-06 12:01Vico LiangNew Issue
2015-08-06 12:01Vico LiangAssigned To => msv
2015-08-06 12:01Vico LiangFile Added: Wire_Explorer.brep
2015-08-07 11:52msvAssigned Tomsv => ifv
2015-09-22 13:55ifvNote Added: 0046002
2015-09-22 13:55ifvAssigned Toifv => msv
2015-09-22 13:55ifvStatusnew => resolved
2015-09-22 13:55ifvSteps to Reproduce Updatedbug_revision_view_page.php?rev_id=11688#r11688
2015-09-22 13:55ifvFile Added: wire.PNG
2015-09-23 11:28msvNote Added: 0046025
2015-09-23 11:28msvAssigned Tomsv => bugmaster
2015-09-23 11:28msvStatusresolved => reviewed
2015-09-23 11:28msvResolutionopen => no change required
2015-09-23 11:30msvNote Added: 0046026
2015-09-23 11:30msvAssigned Tobugmaster => Vico Liang
2015-09-23 11:30msvStatusreviewed => feedback
2015-09-27 17:07Vico LiangNote Added: 0046179
2015-09-27 17:07Vico LiangAssigned ToVico Liang => msv
2015-09-27 17:07Vico LiangStatusfeedback => acknowledged
2015-09-28 09:28msvNote Added: 0046183
2015-09-28 09:28msvAssigned Tomsv => Vico Liang
2015-09-29 04:51Vico LiangNote Added: 0046238
2015-09-29 04:52Vico LiangAssigned ToVico Liang => msv
2015-09-30 09:50msvNote Added: 0046309
2015-09-30 09:50msvAssigned Tomsv => ifv
2015-09-30 09:50msvStatusacknowledged => assigned
2015-10-05 17:38ifvNote Added: 0046482
2015-10-05 17:38ifvAssigned Toifv => msv
2015-10-05 17:39ifvNote Added: 0046483
2015-10-05 17:39ifvStatusassigned => feedback
2015-10-05 17:39ifvNote Deleted: 0046482
2015-10-05 17:48msvNote Added: 0046484
2015-10-05 17:48msvAssigned Tomsv => ifv
2015-10-05 17:48msvStatusfeedback => assigned
2015-10-05 18:29gitNote Added: 0046485
2015-10-05 18:31ifvNote Added: 0046486
2015-10-05 18:31ifvAssigned Toifv => msv
2015-10-05 18:31ifvStatusassigned => resolved
2015-10-05 18:49msvNote Added: 0046488
2015-10-05 18:49msvAssigned Tomsv => bugmaster
2015-10-05 18:49msvStatusresolved => reviewed
2015-10-05 18:50msvResolutionno change required => documentation updated
2015-10-05 19:53mkvAssigned Tobugmaster => mkv
2015-10-06 15:09mkvNote Added: 0046514
2015-10-06 15:09mkvNote Added: 0046515
2015-10-06 15:09mkvAssigned Tomkv => bugmaster
2015-10-06 15:09mkvStatusreviewed => tested
2015-10-06 15:10mkvTest case number => Not needed
2015-10-16 13:18bugmasterChangeset attached => occt master 94520b24
2015-10-16 13:18bugmasterStatustested => verified
2015-10-16 13:18bugmasterResolutiondocumentation updated => fixed
2015-10-16 16:57gitNote Added: 0047076
2016-04-20 15:44aivFixed in Version => 7.0.0
2016-04-20 15:48aivStatusverified => closed

Notes
(0046002)
ifv   
2015-09-22 13:55   
It is not a bug.
One of edge has bad orientation (see attached picture), so wire cannot be explored by BRepTools_WireExplorer.
(0046025)
msv   
2015-09-23 11:28   
I confirm. This tools works correctly only with correct input data. If a wire has incorrectly oriented edges the internal iteration stops.
If you need to iterate all the edges in incorrect wire you need to use TopoDS_Iterator, which returns not ordered edges, or ShapeExtend_WireData, which allows reordering.
(0046026)
msv   
2015-09-23 11:30   
Dear Vico, please confirm closing this bug.
(0046179)
Vico Liang   
2015-09-27 17:07   
Dear msv, yes, i agree that there is no incorrectly oriented edges. Do you think it's still possible to iterate the loop edges? anyway, it's a closed wire and all the edges are connected end-to-end.
(0046183)
msv   
2015-09-28 09:28   
Dear Vico, yes, it is possible to iterate on this loop. For that you can use the class ShapeExtend_WireData. It will return you edges ordered and tell about correct orientation.
(0046238)
Vico Liang   
2015-09-29 04:51   
Dear msv,

Thank you for your help. I suggest to enhance the document of BRepTools_WireExplorer to indicate such situation.
(0046309)
msv   
2015-09-30 09:50   
Dear ifv, please update the class description taking into account this situation.
(0046483)
ifv   
2015-10-05 17:39   
In my opinion, class description contains information that this algo cannot explore wrong wires:

 //!If a wire is not closed returns only a segment of edges which
 //! length depends on started in exploration edge. If wire has
 //! singularities (for example, loops) WireExplorer can return not all
 //! edges in a wire. it depends on type of singularity.
(0046484)
msv   
2015-10-05 17:48   
I propose to point the bad edge orientation as a particular case of singularity.
(0046485)
git   
2015-10-05 18:29   
Branch CR26526 has been created by ifv.

SHA-1: d2129c5e626b09eb49af15554a8197aa35b1caac


Detailed log of new commits:

Author: ifv
Date: Mon Oct 5 18:29:25 2015 +0300

    0026526: BRepTools_WireExplorer can't explore all edges of a closed wire.
(0046486)
ifv   
2015-10-05 18:31   
Branch CR26526 is ready to review
(0046488)
msv   
2015-10-05 18:49   
Reviewed.
No need to test, as only comments were modified.
(0046514)
mkv   
2015-10-06 15:09   
Dear BugMaster,
Branch CR26526 from occt git-repository (and master from products git-repository) was compiled on Linux, MacOS and Windows platforms on Release mode.
SHA-1: d2129c5e626b09eb49af15554a8197aa35b1caac

Number of compiler warnings:

occt component :
Linux: 13 (13 on master)
Windows: 0 (0 on master)

products component :
Linux: 39 (39 on master)
Windows: 0 (0 on master)
(0046515)
mkv   
2015-10-06 15:09   
Dear BugMaster,
Branch CR26526 is TESTED.
(0047076)
git   
2015-10-16 16:57   
Branch CR26526 has been deleted by kgv.

SHA-1: d2129c5e626b09eb49af15554a8197aa35b1caac